1. Field of the Invention
The invention relates to an apparatus for plasma processing of semiconductor wafers, and more particularly, to an electrode assembly wherein the electrode is resiliently clamped to a support member. The invention also relates to a process of assembling the electrode and a process of etching a wafer with the electrode assembly.
2. Description of the Related Art
Dry plasma etching, reactive ion etching, and ion milling techniques were developed in order to overcome numerous limitations associated with chemical etching of semiconductor wafers. Plasma etching, in particular, allows the vertical etch rate to be made much greater than the horizontal etch rate so that the resulting aspect ratio (i.e., the height to width ratio of the resulting notch) of the etched features can be adequately controlled. In fact, plasma etching enables very fine features with high aspect ratios to be formed in films approaching 1 micrometer in thickness.
During the plasma etching process, a plasma is formed above the masked surface of the wafer by adding large amounts of energy to a gas at relatively low pressure, resulting in ionizing the gas. By adjusting the electrical potential of the substrate to be etched, charged species in the plasma can be directed to impinge substantially normally upon the wafer, wherein materials in the unmasked regions of the wafer are removed.
The etching process can often be made more effective by using gases that are chemically reactive with the material being etched. So called "reactive ion etching"combines the energetic etching effects of the plasma with the chemical etching effect of the gas. However, many chemically active agents have been found to cause excessive electrode wear.
It is desirable to evenly distribute the plasma over the surface of the wafer in order to obtain uniform etching rates over the entire surface of the wafer. For example, U.S. Pat. Nos. 4,595,484, 4,792,378, 4,820,371, 4,960,488 disclose showerhead electrodes for distributing gas through a number of holes in the electrodes. These patents generally describe gas dispersion disks having an arrangement of apertures tailored to provide a uniform flow of gas vapors to a semiconductor wafer.
A reactive ion etching system typically consists of an etching chamber with an upper electrode or anode and a lower electrode or cathode positioned therein. The cathode is negatively biased with respect to the anode and the container walls. The wafer to be etched is covered by a suitable mask and placed directly on the cathode. A chemically reactive gas such as CF.sub.4, CHF.sub.3, CC1F.sub.3 and SF.sub.6 or mixtures thereof with O.sub.2, N.sub.2, He or Ar is introduced into the etching chamber and maintained at a pressure which is typically in the millitorr range. The upper electrode is provided with gas holes which permit the gas to be uniformly dispersed through the electrode into the chamber. The electric field established between the anode and the cathode will dissociate the reactive gas forming a plasma. The surface of the wafer is etched by chemical interaction with the active ions and by momentum transfer of the ions striking the surface of the wafer. The electric field created by the electrodes will attract the ions to the cathode, causing the ions to strike the surface in a predominantly vertical direction so that the process produces well-defined vertically etched side walls.
A showerhead electrode assembly 10 for a single wafer etcher is shown in FIG. 1. Such a showerhead electrode 10 is typically used with a convex bottom electrode on which an 8 inch wafer is supported spaced 1 to 2 cm below the electrode 10. The convex shape of the bottom electrode compensates for the bow of the wafer due to applying He pressure to the backside of the wafer which, if not compensated for, will have a weaker plasma field and poorer heat transfer in center. The degree of convexity of the bottom electrode can range from 35 to 50 mils and additional compensation for the weaker plasma field below the center of electrode 10 can be achieved by lowering He pressure applied to the backside of the wafer to increase RF coupling of the plasma to the center of the wafer.
The upper surface of the outer edge of the silicon electrode 10 is metallurgically bonded by In solder to a graphite supporting ring 12. The electrode 10 is a planar disk having uniform thickness from center to edge thereof. An outer flange on ring 12 is clamped by an aluminum clamping ring 16 to an aluminum support member 14 having water cooling channels 13. A plasma confinement ring 18 comprised of a Teflon.RTM. support ring 18a and an annular Vespel.RTM. insert 18b surrounds the outer periphery of electrode 10. The purpose and function of confinement ring 18 is to increase the electrical resistance between the reaction chamber walls and the plasma thereby confining the plasma between the upper and lower electrodes. The clamping ring 16 is attached to support member 14 by twelve circumferentially spaced apart stainless steel bolts 17 threaded into support member 14 and the plasma confinement ring 18 is attached to clamping ring 16 by six circumferentially spaced apart bolts 19 threaded into ring 16. A radially inwardly extending flange of clamping ring 16 engages the outer flange of graphite support ring 12. Thus, no clamping pressure is applied directly against the exposed surface of electrode 10.
Process gas is supplied to electrode 10 through a central hole 20 in the support member 14. The gas then is dispersed through one or more vertically spaced apart baffle plates 22 and passes through gas dispersion holes (not shown) in the electrode 10 to evenly disperse the process gas into reaction chamber 24. In order to provide enhanced heat conduction between ring 12 and support member 14, part of the process gas is supplied through gas passage 27 to fill a small annular groove in support member 14. In addition, gas passage 26 in confinement ring 18 permits pressure to be monitored in the reaction chamber 24. To maintain process gas under pressure between support member 14 and ring 12, a first O-ring seal 28 is provided between a radially inner surface of support ring 12 and a radially outer surface of support member 14 and a second O-ring seal 29 is provided between an outer part of an upper surface of ring 12 and a lower surface of support member 14.
The process of bonding the silicon electrode 10 to the supporting ring 12 requires heating of the electrode to a bonding temperature which may cause bowing or cracking of the electrode due to the different thermal coefficients of expansion of the silicon electrode 10 and the graphite ring 12. Also, contamination of wafers could result from solder particles or vaporized solder contaminates deriving from the joint between electrode 10 and ring 12 or from the ring itself. The temperature of the electrode may even become high enough to melt the solder and cause part or all of the electrode 10 to separate from the ring 12. However, even if the electrode 10 becomes partly separated from ring 12, local variations in electrical and thermal power transmission between ring 12 and electrode 10 could result in nonuniform plasma density beneath the electrode 10.